Physical Therapist Jobs in Singapore

Centre for Quantum Technologies at Nanyang Technological University conducts cutting‑edge quantum research. The Research Assistant will support experimental quantum simulation with ultracold gases, handling equipment setup, data collection, analysis, and reporting.

School of Physical and Mathematical Sciences (SPMS) is a young and dynamic school dedicated to providing top-notch physics-based education and conducting world class research. For more details, please view https://www.ntu.edu.sg/spms. We are looking for a Research Fellow to complete the project on low dimensional quantum materials and devices and ensure the success of the project and support other related projects, contributing to the scientific impact of the University.

Manager, Physical Sciences role at Science Centre Singapore focuses on leading and developing immersive physical science learning experiences. Responsibilities include managing a team, overseeing project development, staff scheduling, performance appraisals, training, and certification programs.

Professor (Tenured) in Physics at Nanyang Technological University (NTU) seeks an established scientist to lead research in Photonics and related areas. The role is based at NTU Main Campus, Singapore, with a partnership with the University of Southampton’s Optoelectronics Research Centre (ORC).

Silicon Labs, a leader in low‑power wireless connectivity, seeks a Physical Design Intern to join its IoT Digital team in Singapore. The role focuses on designing and verifying peripheral IP blocks for next‑generation MCU products.

Chevron seeks an LNG Physical Trader to manage and execute LNG trading activities across the Pacific Basin, Middle East, JKTC, and SEA. The role involves trading physical LNG cargoes, managing price exposure, and applying deep LNG market knowledge to develop hedging strategies. The trader will collaborate with global teams, act as a subject‑matter expert, and support the development of a unified supply‑demand outlook.

Engineer, Physical Design at Marvell focuses on physical design and methodology for next‑generation high‑performance processor chips in leading‑edge CMOS technology. Based in Singapore, the role works with a global team to synthesize RTL, place‑and‑route, run timing and EMIR analysis, verify power grids, and optimize design flows.

SPMS at NTU leads quantum science research, focusing on quantum information theory, communication, and resource theories. The Research Fellow will investigate quantum resources and correlations, develop theoretical frameworks linking them to communication protocols, and publish in top journals.

Marex Physical Commodities Finance team drives financial strategy for global trading operations. The Director designs and scales finance, reporting and control frameworks, partners with front‑office traders, risk and treasury to launch new physical trading activities, and leads a finance team.

Micron Technology seeks a Senior Engineer, Physical Failure Analysis to lead full physical failure analysis support for qualifications, new product introduction, and high volume manufacturing failures. The role requires subject‑matter expertise in FA methodology and tools such as Ion Millers, FIB/EDX, SEM, 2D/3D X‑ray, X‑section, planar grinding, and other lab equipment.

Micron NAND Technology Integration (NTI) Singapore seeks a Yield Enhancement Physical Failure Analysis Technician to identify and communicate failure mechanisms for next‑generation Micron products. The role involves hands‑on use of acid hood, polish wheel, delayer techniques, SEM, dual‑beam FIB, and STEM/TEM to support root‑cause analysis and process transfer into production.

Analog Devices, a global semiconductor leader, seeks a Senior Engineer in Physical Design Engineering to join its Singapore Kallang team. The role focuses on block-level floor‑planning, layout creation from design schematics, and rigorous physical and reliability verification (DRC/LVS/ERC).

School of Physical and Mathematical Sciences at Nanyang Technological University, Singapore focuses on cutting‑edge research in physics and mathematics. The Research Fellow will design and develop high‑performance MRAD devices, manage collaborations with industry partners, and lead technical reporting for AI memory projects.

Senior Staff Engineer, Physical Design at Marvell Software Solutions Israel focuses on physical design and methodology for next-generation processor chips in a leading-edge CMOS process. The role involves collaborating with cross-disciplinary teams, implementing multi-voltage designs, mentoring junior staff, and automating workflows through scripting.

Astera Labs, a leading AI infrastructure provider, seeks a Senior Physical Design Engineer to drive the physical implementation of next‑generation transceiver IPs on TSMC 5nm/3nm nodes. The role involves full‑chip and block‑level design, floor planning, placement, CTS, routing, and rigorous physical verification to achieve timing, power, and area targets for ultra‑high‑speed transceivers.

Marvell’s semiconductor solutions empower data infrastructure across enterprise, cloud, and AI. As a Senior Engineer, Physical Design, you’ll lead the physical design and methodology for next‑generation high‑performance processor chips in advanced CMOS nodes (7nm, 5nm). Working with a global team, you’ll run RTL through synthesis and place‑and‑route, perform timing, EM/IR, and verification analyses, and optimize designs to meet sign‑off criteria.

ASIC Physical Design Team at Broadcom designs cutting‑edge silicon for high‑performance applications. The engineer drives full RTL‑to‑GDS flow for 100‑400M‑gate chips in advanced 7nm‑2nm processes, handling placement, CTS, routing, verification and timing analysis.

Equinix seeks a Director, Physical Security Enablement to lead APAC physical security strategy, oversee global programs, manage cross‑functional teams, and drive security initiatives across data centres.

Join the School of Physical and Mathematical Sciences at NTU Singapore as a Research Fellow in Quantum Physics. The role focuses on developing a neutral atom array quantum processor, designing and building a cold atom apparatus with state‑of‑the‑art laser, vacuum and photonics technology, and creating the interface to drive the processor.

Broadcom ASIC Design Team builds high‑performance integrated circuits for next‑generation networking and compute platforms. The ASIC Physical Design Engineer will lead full RTL‑to‑GDS implementation of 100‑400M gate chips in 7nm‑2nm processes, handling placement, clock tree synthesis, routing, verification and timing analysis while scripting in UNIX/Linux environments.